Computer for solving simultaneous equations



J. R. YoUNKlN 2,808,989

COMPUTER FOR SOLVING SIMULTANEOUS EQUATIONS 2 Sheets-Sheet l oct s, v1957 Filed Sept. 20, 1954 INVENTOR.

J. R. YOUNKIN ATTORNEYS Oct. 8, 1957 J. R. YouNKlN COMPUTER FOR SOLVING SIMULTANEOUS EQUATIONS Filed Sept. 20. 1954 2 Sheets-Sheet 2 FIG. 3.

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AT TORNEKS 2,808,989 Patented Oct. 8, 1957 COMPUTER FOR SOLVING SIMULTANEOUS EQUATIONS `lames R. Younkin, Bartlesville, Okla., assignor to Phillips Petroleum Company, a corporation of Delaware Application September 20, 1954, Serial No. 457,224 7 Claims. (Cl. 23S-61) This invention relates to a computer for solving simultaneous linear equations.

lThe rapid solution of sets of simultaneous linear equations is of considerable importance in various industries. For example, the analysis of materials by infrared or mass spectroscopy often involves the solution of such equations. Elementary methods of elimination or substitution generally are not satisfactory for systems having more than four variables. While systems having more than four variables can be solved by methods of successive approximations, this procedure requires a considerable knowledge of mathematics and is often time consuming. For these reasons a number of computers have recently been developed to solve simultaneous equations by the Gauss-Siedel method of iteration. These cornputers generally employ a plurality of pairs of cascade connected potentiometers to perform the multiplication operations. The addition operations are performed by summing networks which are connected to current indicating devices to determine the condition of balance. The values of the known quantities are established on appropriate potentiometers and the balancing potentiometers are adjusted in succession until a solution is obtained. While computers of this type operate in a satisfactory manner, they often require a considerable period of time to determine the exact solution.

ln accordance with the present invention there is provided an improved computer for solving simultaneous linear equations which employs a plurality of servo motors to perform the balancing operations automatically in each network. The voltage sums to be compared are applied in opposition to the inputs of the servo motors in each network. This computer is thus capable of solv ing sets of simultaneous linear equations having large numbers of unknowns in extremely short times.

Accordingly, it is an object of this invention to provide an automatic computer for solving simultaneous linear equations.

Another object is to provide a simultaneous linear equation computer which is energized by a source of alternating potential.

Other objects, advantages and features of this invention should become apparent from the following detailed description taken in conjunction with the accompanying drawing in which:

Figure l is a schematic circuit diagram of the computer assembly of this invention;

Figure 2 is a schematic circuit diagram of one of the amplifiers and servo motors shown in Figure 1; and

Figure 3 is a schematic circuit diagram of a phase inversion network which can be employed in the circuit of Figure 1.

The electrical computer of this invention is adapted to solve a general set of simultaneous linear equations of the form.

(lll

This set of equations can also be designated as follows:

7l Ean=kt j=1 ti=l to n, where n is a positive integer.)

With reference to Figure l, the computer network is energized by a source of alternating potential 10 having output terminals 11 and 12, the latter being connected to ground. Terminal 11 is connected to corresponding first end terminals of a plurality of potentiometers X1, X2 X11. Corresponding second end terminals of these potentiometers are connected to ground. Terminal i1 is also connected to the first end terminals of a plurality of potentiometers K1, K2 K11. The second end terminals of this second group of potentiometers are also connected to ground. The contactors of potentiometers X1, X2 X11 are connected to input terminals of respective phase inversion network P1, P2 P11. Network P1 is provided with a plurality of output leads G1 which are maintained at a common potential that is 180 out of phase with the potential at the contacter of po tentiometers X1. Networks P2 P11 are provided with corresponding respective output leads G2 G11.

A plurality of potentiometers A11, A21 A111 is provided in conjunction with phase inversion network P1. Corresponding first end terminals of these potentiometers are grounded and corresponding second end terminals are connected to respective switches S11, S21 S111. These switches are adapted to engage respective leads G1 in their right-hand positions and a lead H1 in their left-hand positions. Lead H1 is connected to the contactor of potentiometer X1. The contactors of potentiometers A11, A22 A111 are connected to first terminals of respective resistors R11, R21 R111. Potentiometers A11, A21 A111 should have considerably higher resistances than potentiometer X, to prevent substantial current llow from potentiometer X1. For example, the former potentiometers can have total resistances of 5000 ohms each, while potentiometer X, can have a total resistance of 25 ohms.

Phase inversion networks P2 P11 are provided with corresponding A potentiometers, S switches and R resistors, as illustrated.

The contactors of potentiometers X1, X2 X11 are mechanically coupled to drive the shafts of respective servo motors M1, M2 M11, which are rotated by the output signals from respective servo amplifiers V1, V2 V11. One input terminal of amplifier V1 is connected to ground and the second input terminal thereof is connected to the second terminals of resistors R11, R12 R111. One input terminal of the amplifier V2 is connected to ground and the second input terminal thereof is connected to the second terminals of resistors R21, R22 R211. One input terminal of amplifier V11 is connected to ground and the second input terminal thereof is connected to the second terminals of resistors R111, R112 Rnn. The second input terminals of amplifiers V1, V2 V11 are also connected to the contactors of respective potentiometers K1, K2 K11 through respective resistors T1, T2 T11.

When the computer is employed to solve the set of equations described above for the values of x1. .r3 .rw the values of the constants k1, k2 kn are set on respective potentiometers K1, K2 K11. In this manner the voltages appearing at the contactors of these potentiometers, with respect to ground, are representative of the corresponding constants k in the set of equations. The coefficients au, a2, an, are likewise set on respective potentiometers A11, A21 A111. If these values of the a coeicents are positive, the switches S associated with the A potentiometers are moved to the right-hand position to engage respective leads G1. lf the value of a particular coefiicient is negative, the corresponding S switch is moved to the left-hand position to engage lead H1. ln like manner, the coefficients am, a2c an, are set on respective potentiometers A12, A22 Anz and the coefficient am, a2 am, are set on respective potentiometers A111. A211 Amt.

Once the coefficients and constants are set on their respective potentiometers, switch 13 is closed to energize the computer. The potential appearing at the contactor of potentiometers A12 is representative of thc product awry Similarly, the potential appearing at the contactor of potentiometer A12 is representative of the produce amr, and the potential appearing at the contactor of potcntiometer A1" is representative of the product amr.

These potentials are summed by the network comprising resistors R11, R12 R111. The summed potential is applied to the second input terminal of amplifier V1 in opposition to the potential appearing at the contacter of potentiometer K1. If these two potentials applied to the second terminal of amplifier V1 are unequal, motor M1 is rotated to move the contactor of potentiometer X1, thereby varying the summed potential. Rotation of motor M1 continues until the two opposing potentials applied to the input of amplifier V1 are equal. Motors M2 Mn rotate simultaneously in response to the corresponding potential differences applied to the inputs of respective amplifiers V2 V11. Rotation of motors M2 Mn adjusts the settings of the contactors of potentiometer X2 Xn until these latter motors also come to rest. When the network is completely balanced, all of the motors M1, M2 Mn are stationary and the positions of the contactors of potentiometers X1, X2 Xn are representative of the respective values of the unknown terms .13. ai, xn of the set of equations being solved.

The phase inversion networks P1, P2 P11 are provided so that the voltages at the contactors of the A potentiometers are 180 out of phase with the voltages at the contactors of the K potentiometers when the coetiicients of the equations are positive. This results in the voltages applied to the V amplifiers from the A and K potentiometers being in phase opposition to one another. When the magnitudes of these voltages are equal the associated servo motors remain stationary. When the individual coefficients are negative the associated S switches are moved to the respective left-hand positions to engage the associated H leads. This compensates for the sign change, and the potentials applied to the inputs of the V amplifiers remain in opposition.

In Figure 2 there is shown a suitable amplifier and servo motor for use in the computer of Figure 1. first input terminal of amplifier V1 is connected to ground and the second input terminal 21 is connected to the control grid of a first triode 22. The cathode of triode 22 is connected to ground through a resistor 23 which is shunted by a capacitor 24. The anode of triode 22 is connected to a positive potential terminal 26 through a resistor 27 and to the control grid of a second triode 28 through a capacitor 29. The cathode of triode 28 is connected to ground through a resistor 30 which is shunted by a capacitor 31. The anode of triode 28 is connected to positive potential terminal 26 through a resistor 33 and to the control grids of four triodes 35, 36, 37 and 38 through a capacitor 39. The control grids of these four triodes 35, 36, 37 and 38 are connected to ground through a resistor 40.

The cnthodes of triodes 35, 36, 37 and 38 are connected to ground through a common resistor 41. The anodes of triodes and 37 are connected to the first end terminal of the secondary winding 42 of a transformer 43. The anodes of triodes 36 and 38 are connected to the second end terminal of transformer winding 42. The center tap of transformer winding 42 is connected to one end terminal of the first winding 44 of a two phase reversible motor M1. The second terminal of motor winding 44 is connected to ground. A capacitor 45 is The connected in shunt with motor winding 44. The primary Winding 46 of transformer 43 is energized by a voltage source 47 which is also connected in series relation with a capacitor 49 and the second winding 48 of motor M1. A second secondary winding 50 on transformer 43 comprises voltage source 10 of Figure l.

A signal applied to the input terminals of amplifier V1 is amplified by triodes 22 and 28 and applied to the control grids of triodes 35, 36, 37 and 38. ln the absence of a signal being applied to the control grids of triodes 35 and 36, substantially equal currents flow through the two tubes 0n alternate half cycles of the p0- tential from voltage source 47 being applied to the plates of the two triodes. The resulting current flow through motor winding 44 is of a frequency twice the frequency' of voltage source 47. Since the voltage applied across motor winding 4S is of the same frequency as voltage source 47, the motor remains stationary. However, if a voltage signal is applied to the control grids of triodes 35 and 37, the conduction through the two triodes increases from the previous value during alternate half cycles of the potential applied to the anodes of the two triodes. This results in an unbalanced output signal flowing through motor winding 44 which has a component of the same frequency as the frequency of voltage source 47 so that motor M1 rotates in either a forward or reverse direction depending upon the relative phase of the input signal applied to amplifier V1. The phase of the signal applied to amplifier V1, in turn depends upon the relative magnitude of the two voltages applied to input terminal 21 as previously described. Triodes 37 and 38 are provided in parallel with respective triodes 35 and 36 as a safety factor in the event one of the triodes should burn out.

The phase inversion networks P1, P2 P11 are employed to provide voltages 180 out of phase with the input voltages applied thereto. These networks preferably comprise a voltage amplifying tube feeding a cathode follower to provide a low impedance output signal. The voltage gain of the amplifier should be substantially unity so that the voltages applied to the G and H leads are of substantially the same magnitude` In Figure 3 there is shown a phase inversion network which is particularly adapted for use in the computer of Figure l.

The first input terminal of phase inversion network P1 is connected to the contacter of potentiometer X1 in Figure l. The second input terminal of the first inver sion network is considered to be ground. Terminal 60 is connected through a resistor 61 to the first end terminal of a potentiometer 62. The contactor of potentiometer 62 is connected to the control grid of a pentode 63. The cathode and the suppressor grid of pentode 63 are connected to ground through a resistor 64 which is shunted by a capacitor 65. The anode of pentode 63 is connected to a positive potential terminal 66 through a resistor 67 and to the control grid of a triode 68 through a capacitor 69. Resistors 70 and 71 are connected in series relation between voltage terminal 66 and ground, the junction between these two resistors being connected to the screen grid of pentode 63. The control grid of triode 68 is connected to ground through series connected resistors 72 and 64, and the cathode of triode 68 is connected directly to leads G1. Leads G1 are considered to represent the first output terminal of the phase inversion network, the second output terminal being ground. The cathode of triode 68 is also connected to the second end terminal of potentiometer 62 through a capacitor 73 and a resistor 74 connected in series relation, these elements forming a degenerative feedback network. The circuit of Figure 3 thus provides output voltages at least G1 which are out of phase with the input voltage applied to terminal 60 and of substantially the same amplitude.

From the foregoing description it should be apparent that the computer of this invention offers several important advantages in the solution of simultaneous linear equations. The most important feature is the saving of time which results from the fact that the balancing operation is performed simultaneously and automatically in each individual network. While the invention has been described in conjunction with a present preferred embodiment, it should be evident that the invention is not limited thereto.

What is claimed is:

l. A computer for solving a set of equations of the form for the values of x where i varies from one to n, and n is a positive integer greater than one, comprising: n networks, each of said networks including a first potentiometer, n second potentiometers having first end terminals thereof connected to the contactor of said first potentiometer, the second end terminals of said second potentiometers being connected to one end terminal of said first potentiometer, a third potentiometer, a servo motor, means connecting the drive shaft of said servo motor to the contactor of said first potentiometer, and means applying the potential between the contactor of said third potentiometer and one end terminal thereof to the input of said servo motor; a voltage source; means applying said voltage source across the end terminals of said first and third potentiometers in each of said networks; and means summing the potentials between said one end terminals of said first potentiometers and the contactors of corresponding ones of said second potentiometers in each of said networks and applying said summed potentials to the inputs of respective ones of said servo motors.

2. A computer for solving a set of equations of the form J-l for the values of x where i varies from one to n, and n is a positive integer greater than one, comprising: n networks, each of said networks including a first potentiometer, phase inversion means to provide an output alternating signal 180 out of phase with an input signal supplied thereto, the input terminals of said phase inversion means being applied to the contactor and one end terminal of said first potentiometer, respectively, n second potentiometers having first end terminals thereof connected to the rst output terminal of said phase inversion means, the second end terminals of said second potentiometers being connected to said one end terminal of said first potentiometer and the second output terminal of said phase inversion means, a third potentiometer, a servo motor, means connecting the drive shaft of said servo motor to the contactor of said first potentiometer, and means applying the potential between the contactor of said third potentiometer and one end terminal thereof to the input of said servo motor; an alternating voltage source; means applying said voltage source across the end terminals of said first and third potentiometers in each of said networks; and means summing the potentials between said one end terminals of said first potentiometers and the contactors of corresponding ones of said second potentiometers in each of said networks and applying said summed potentials to the inputs of respective ones of said servo motors.

3. The combination in accordance with claim 2 wherein said phase inversion means each comprises a first vacuum tube having at least an anode, a cathode and a control grid, means connecting said input terminals to the control grid and cathode of said first tube, a second tube having an anode, a cathode and a control grid, means connecting the anode of said first tube to the control grid of said second tube, and a feedback circuit connected between the cathode of said second tube and the control grid of said first tube, the cathode of said second tube representing one output terminal of said phase inversion means.

4. The combination in accordance with claim 2 further comprising switching means in each of said network to connect the end terminals of said second potentiometers selectively to the output terminals of said phase inversion means and to the contactor and said one end terminal of said first potentiometer.

S. A computer for solving a set of equations of the form for the values of x where i varies from one to n, and n is a positive integer greater than one, comprising: n networks, each of said networks including a first potentiometer, phase inversion means to provide an output alternating signal out of phase with an input signal supplied thereto, the input terminals of said phase inversion means being applied to the contactor and one end terminal of said first potentiometer, respectively, n second potentiometers having first end terminals thereof connected to the first output terminal of said phase inversion means. the second end terminals of said second potentiometers being connected to said one end terminal of said first potentiometer and the second output terminal of said phase inversion means, n first resistors having first end terminals thereof connected to the respective contactors of said second potentiometers, an amplifier, n reversible motor actuated by the output signal from said amplifier, means connecting the drive shaft of said motor to the contactor of said first potentiometer, a third potentiometer, and a second resistor having one end terminal thereof connected t0 the contactor of said third potentiometer, the second end terminal of said second resistor being connected to one input terminal of said amplifier, the second input terminal of said amplifier being connected to said one end terminal of said first potentiometer; an alternating voltage source; means applying said voltage source across the end terminals of said first and third potentiometers in each of said networks; and n leads connected to the respective said one input terminals of said amplifiers, each of said -leads being connected to the second end terminals of respective ones of said first resistors in each of said networks.

6. The combination in accordance with claim 5 further comprising switching means in each of said networks to connect the end terminals of said second potentiometers selectively to the output terminals of said phase inversion means and to the contactor and said one end terminal of said first potentiometer.

7. A computer for solving a set of simultaneous equations of the form for the values of x where i varies from one to n, and n is a positive integer greater than one, comprising: n networks, each of said networks including a first potentiometer, phase inversion means to provide an output alterhating signal 180 ont of phase with an input signal supplied thereto, the input terminals of said phase inversion means being applied to the contactor and one end terminal of said first potentiometer, respectively, n second potentiometers, n switches to connect the first end terminals of said second potentiometers selectively to the contactor of said first potentiometer and to the first output terminal of said phase inversion means, the second end terminals of said second potentiometers bcing connected to said one end terminal of said first potentiorneter and the second output terminal of said phase inversion means, n first resistors having first end terminals thereof connected tothe respective contactors of said second potentorneters, the contactor settings of said n second potentiometers representing respective a coecient for i equal one to n, an amplifier, a reversible motor actuated by the output signal from said amplifier, means connecting the drive shaft of said motor to the contactor of said first potentiometer, a third potentiometer, and a second resistor having one end terminal thereof connected to the contacto:- of said third potentiometer, the contactor setting of said third potentiometer representing one of said lt coeicient, the second end terminal of said second resistor being Connected to one input terminal of said amplifier, the second input terminal of said amplifier being connected to said one end terminal of said first potentiometer; an alternating voltage source; means applying said voltage source across the end terminals of said first and third potentiometers in each of said networks; and 11 leads Connected to the respective said one input 5 tive x values when all of said motors are stationary.

References Cited in the file of this patent UNITED STATES PATENTS 1n 2,476,747 Lovell July 19, 1949 2,.'\'"i5,i`fll Oliver Apr. 25, 1950 2,584,809 Oberlin Feb. 5, 1952 OTHER REFERENCES Fritz: Analog Computers for Coordinate T ransformalion," Review of Scientific Instruments, vol. 23, No. 12, December 1952, pp. 667-67l. 

